1. Field of the Invention
The present disclosure generally relates to semiconductor devices and methods, and, more particularly, to non-volatile memory devices in SOI technologies and methods of fabricating according devices.
2. Description of the Related Art
In modern electronic equipment, integrated circuits (ICs) experience a vast applicability in a continuously spreading range of applications. Particularly, the demand for increasing mobility of electronic devices at high performance and low energy consumption drives developments to more and more compact devices having features with sizes ranging even into the deep sub-micron regime; the more so as current semiconductor technologies are apt of producing structures with dimensions in the magnitude of 10 nm. With ICs representing a set of electronic circuit elements integrated on a semiconductor material, normally silicon, ICs can be made much smaller than discreet circuits composed of independent circuit components. The majority of present-day ICs are implemented by using a plurality of circuit elements, such as field effect transistors (FETs), also called metal oxide semiconductor field effect transistors (MOSFETs or simply MOS transistors), and passive elements, such as resistors and capacitors, integrated on a semiconductor substrate with a given surface area. Typically, present-day integrated circuits involve millions of single circuit elements formed on a semiconductor substrate.
The basic function of a FET or a MOSFET is that of an electronic switching element, wherein a current through a channel region between two contact regions, referred to as source and drain, is controlled by a gate electrode, which is disposed over the channel region and to which a voltage relative to source and drain is applied. Particularly, in applying a voltage exceeding a characteristic voltage level to the gate electrode, the conductivity state of a MOSFET is changed and the characteristic voltage level, usually called “threshold voltage” and in the following referred to as Vt, characterizes the switching behavior of a MOSFET. In general, Vt depends nontrivially on the transistor's properties, e.g., materials, dimensions, etc., such that the implementation of a desired Vt involves plural steps of adjustment and fine-tuning during the fabrication process.
With the continuous scaling down to increasingly small technology nodes in the deep sub-micron regime (at present at 22 nm and beyond), various issues and challenges arise. For example, a precise control of the electrical conductivity of the channel of a MOS transistor is difficult to maintain at very small process geometries. Since the switching behavior of a MOSFET is characterized by the threshold voltage Vt of a MOSFET, the precise setting of a definition and control of the threshold Vt throughout the fabrication process of semiconductor devices is essential for achieving optimal power consumption and performance of semiconductor device structures. In general, there are several factors which control the threshold voltage VT, such as the gate oxide thickness, the work function of the gate, and the channel doping, mainly representing independent factors. The scaling of a semiconductor device to more advanced technology nodes led to faster switching and higher current drive behaviors for advanced semiconductor devices, at the expense, however, of a decreased noise margin, increased leakage current and increased power.
Currently, the most common digital integrated circuits built today use CMOS technology, which is fast and offers a high circuit density and low power per gate. CMOS devices or “complementary symmetry metal oxide semiconductor” devices, as sometimes referred to, make use of complementary and symmetrical pairs of P-type and N-type MOSFETs. Two important characteristics of CMOS devices are the high noise immunity and low static power consumption of a CMOS device because the series combination of complementary MOSFETs in a CMOS device draws significant power only momentarily during switching between on- and off-states, since one transistor of a CMOS device is always in the off-state. Consequently, CMOS devices do not produce as much waste heat as other forms of semiconductor devices, for example, transistor-transistor logic (TTL) or NMOS logic devices, which normally have some standing current even when not changing state. In current CMOS technologies, standard transistors and IO devices have the same high-k dielectric and metal electrode, whereas, in comparison with standard devices, the SiO2 oxide of IO devices is thicker.
Digital electronic circuits are usually made from large assemblies of logic gates. Memory is a key element of digital electronic circuits as the output of a digital electronic circuit often depends not only on the present value of the inputs to the digital electronic circuit, but also on the circuit's previous state. Memory devices may be distinguished by non-volatile memory (NVM) and volatile memory devices. Volatile memory devices, as opposed to NVM devices, require constant power to maintain the stored information and are often implemented in the form of dynamic random access memory (DRAM) or static random access memory (SRAM) devices. By contrast, NVM devices retain the stored information even when not constantly supplied with electric power. Accordingly, NVM devices are suitable for long-term storage of information and, therefore, are important to mobile electronic circuits. An example of an electronic non-volatile computer storage medium is given by flash memory, which was originally developed from electrically erasable programmable read only memory (EEPROM). In a more recent application, flash memories are used as a replacement for hard discs. Since flash memory does not have the mechanical limitations and latencies of hard drives, flash-based drives are attractive when considering speed, noise, power consumption and reliability of hard drives. Accordingly, flash drives are gaining in popularity as mobile devices, secondary storage devices and as substitutes for hard drives in high performance desktop computers.
Currently, non-volatile and reconfigurable field programmable gate arrays (FPGAs) are considered as representing an attractive solution for high level system integration in various applications, such as aerospace and military applications. Unlike SRAM-based FPGAs, the configuration memories are not volatile and, hence, do not require additional NVM to reload the device configuration data at system power-up or due to radiation effects, in addition to triple module redundancy (TMR) of its entire set of configuration bits.
In efforts to improve memory arrays, field effect transistors with ferroelectric gates (FeFETs) have been recently in the focus of research. In general, ferroelectric materials have dielectric crystals which show a spontaneous electric polarization similar to ferromagnetic materials showing a spontaneous magnetization. Upon applying an appropriate external electric field to a ferroelectric material, the direction of polarization can be reoriented. The basic idea is to use the direction of spontaneous polarization in ferroelectric memories for storing digital bits. In FeFETs, the effect that one makes use of is the possibility to adjust the polarization state of a ferroelectric material on the basis of appropriate electrical fields which are applied to the ferroelectric material which, in a FeFET, is usually the gate oxide. Since the polarization state of a ferroelectric material is preserved unless it is exposed to a high, with regard to the polarization state, counter-oriented electrical field or a high temperature, it is possible to “program” a capacitor formed of ferroelectric material such that an induced polarization state reflects an information unit. Therefore, an induced polarization state is preserved, even upon removing an accordingly “programmed” device from a power supply. In this way, FeFETs allow the implementation of non-volatile electrically-switchable data storage devices.
On the basis of ferroelectric materials, it is possible to provide non-volatile memory devices, particularly random-access memory devices similar in construction to DRAM devices, but differing in using a ferroelectric layer instead of a dielectric layer such that non-volatility is achieved. For example, the 1T-1C storage cell design in a FeRAM is similar in construction to the storage cell in widely used DRAM in that both cell types include one capacitor and one access transistor—a linear dielectric is used in a DRAM cell capacitor, whereas, in a FeRAM cell capacitor, the dielectric structure includes a ferroelectric material. Other types of FeRAMs are realized as 1T storage cells which consist of a single FeFET employing a ferroelectric dielectric instead of the gate dielectric of common MOSFETs. The current-voltage characteristic between source and drain of a FeFET depends in general on the electric polarization of the ferroelectric dielectric, i.e., the FeFET is in the on- or off-state, depending on the orientation of the electric polarization state of the ferroelectric dielectric. Writing of a FeFET is achieved in applying a writing voltage to the gate relative to source, while a 1T-FeRAM is read out by measuring the current upon applying a voltage to source and drain. It is noted that reading out of a 1T-FeRAM is non-destructive.
Though a FeFET or a ferroelectric capacitor represent in theory very promising concepts for complex semiconductor devices, it is a difficult task to identify appropriate ferroelectric materials which are compatible with existing advanced manufacturing processes of complex devices, particularly at very small scales. For example, commonly-known ferroelectric materials, such as PZT or perovskites, are not compatible with standard CMOS processes. According to present understanding, hafnium (Hf) materials which are used in current fabrication technologies exhibit a paraelectric behavior due to the predominantly monoclinic crystal structure present in HfO2. However, recent research results indicate that dielectric materials on the basis of hafnium oxide may represent promising candidates for materials with ferroelectric behavior to be used in the fabrication of ferroelectric semiconductor devices of ICs. For example, it was shown that the monoclinic structure may be suppressed in Zr, Si, Y and Al-doped hafnium oxide materials and stabilized crystal structures of ferroelectric nature were obtained in experiments with accordingly-doped samples, wherein such doped hafnium oxide materials are deposited by atomic layer deposition (ALD), chemical vapor deposition (CVD) or the like, using an appropriate precursor for implementing the desired doping. In any case, a TiN liner is to be formed on the deposited hafnium oxide material in order to stabilize the ferroelectric phase during subsequent processing.
In accordance with known process flows for fabricating embedded non-volatile memory devices via FeFETs, the ferroelectric material is deposited during gate stack formation in front end of line (FEOL) processes, in parallel to standard logic and IO devices. Particularly, three different types of gate stacks are to be formed in parallel when employing CMOS technology processes at advanced technology nodes when forming embedded NVM devices. The difficulty here is to form appropriate gate dielectrics for IO devices, FeFET devices and logic devices in parallel, because the gate dielectric of IO and FeFET devices, for example, requires a comparatively thick gate dielectric when compared to the gate dielectric of logic devices. Furthermore, the gate dielectric of FeFET devices needs to be ferroelectric and, therefore, a ferroelectric high-k material needs to be used in the gate dielectrics.
In view of the above explanations, it may be desirable to improve existing implementations of embedded NVM devices into CMOS technology in an efficient way without rendering known process flows too complex.
It is, therefore, desirable to control the threshold voltage VT of advanced semiconductor devices at advanced technology nodes, and to provide semiconductor device structures that allow for adjustment and tuning of the threshold voltage VT, particularly in flash memory technologies.